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Implement initial opt_lt
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21696ad81e
commit
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9 changed files with 143 additions and 34 deletions
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@ -6,7 +6,7 @@ module RubyVM::MJIT
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# A thin Fiddle wrapper to write bytes to memory
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ByteWriter = CType::Immediate.parse('char')
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# Used for rel8 jumps
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# rel8 jumps are made with labels
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class Label < Data.define(:id, :name); end
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# rel32 is inserted as [Rel32, Rel32Pad..] and converted on #resolve_rel32
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@ -20,7 +20,6 @@ module RubyVM::MJIT
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Mod10 = 0b10 # Mod 10: [reg]+disp16
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Mod11 = 0b11 # Mod 11: reg
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### prefix ###
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# REX = 0100WR0B
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REX_B = 0b01000001
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REX_R = 0b01000100
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@ -94,6 +93,50 @@ module RubyVM::MJIT
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insn(opcode: 0xe8, imm: rel32(addr))
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end
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def cmovl(dst, src)
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case [dst, src]
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# CMOVL r64, r/m64 (Mod 11: reg)
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in [Symbol => dst_reg, Symbol => src_reg]
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# REX.W + 0F 4C /r
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# RM: Operand 1: ModRM:reg (r, w), Operand 2: ModRM:r/m (r)
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insn(
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prefix: REX_W,
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opcode: [0x0f, 0x4c],
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mod_rm: ModRM[mod: Mod11, reg: dst_reg, rm: src_reg],
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)
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else
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raise NotImplementedError, "cmovl: not-implemented operands: #{dst.inspect}, #{src.inspect}"
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end
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end
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def cmp(left, right)
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case [left, right]
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# CMP r/m64 r64 (Mod 01: [reg]+disp8)
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in [[Symbol => left_reg, Integer => left_disp], Symbol => right_reg]
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# REX.W + 39 /r
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# MR: Operand 1: ModRM:r/m (r), Operand 2: ModRM:reg (r)
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insn(
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prefix: REX_W,
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opcode: 0x39,
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mod_rm: ModRM[mod: Mod01, reg: right_reg, rm: left_reg],
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disp: left_disp,
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)
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else
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raise NotImplementedError, "cmp: not-implemented operands: #{left.inspect}, #{right.inspect}"
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end
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end
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def je(dst)
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case dst
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# JE rel32
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in Integer => dst_addr
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# 0F 84 cd
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insn(opcode: [0x0f, 0x84], imm: rel32(dst_addr))
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else
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raise NotImplementedError, "je: not-implemented operands: #{dst.inspect}"
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end
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end
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def jmp(dst)
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case dst
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# JMP rel32
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@ -285,6 +328,16 @@ module RubyVM::MJIT
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def test(left, right)
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case [left, right]
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# TEST r/m8*, imm8 (Mod 01: [reg]+disp8)
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in [[Symbol => left_reg, Integer => left_disp], Integer => right_imm] if imm8?(right_imm)
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# REX + F6 /0 ib
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# MI: Operand 1: ModRM:r/m (r), Operand 2: imm8/16/32
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insn(
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opcode: 0xf6,
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mod_rm: ModRM[mod: Mod01, reg: 0, rm: left_reg],
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disp: left_disp,
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imm: imm8(right_imm),
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)
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# TEST r/m32, r32 (Mod 11: reg)
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in [Symbol => left_reg, Symbol => right_reg] if r32?(left_reg) && r32?(right_reg)
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# 85 /r
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@ -294,7 +347,7 @@ module RubyVM::MJIT
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mod_rm: ModRM[mod: Mod11, reg: right_reg, rm: left_reg],
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)
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else
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raise NotImplementedError, "pop: not-implemented operands: #{dst.inspect}"
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raise NotImplementedError, "test: not-implemented operands: #{left.inspect}, #{right.inspect}"
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end
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end
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@ -442,7 +495,7 @@ module RubyVM::MJIT
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unless imm8?(imm)
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raise ArgumentError, "unexpected imm8: #{imm}"
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end
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imm_bytes(imm, 1)
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[imm].pack('c').unpack('c*') # TODO: consider uimm
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end
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# id: 4 bytes
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@ -450,7 +503,7 @@ module RubyVM::MJIT
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unless imm32?(imm)
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raise ArgumentError, "unexpected imm32: #{imm}"
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end
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[imm].pack('l').unpack('c*')
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[imm].pack('l').unpack('c*') # TODO: consider uimm
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end
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# io: 8 bytes
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