Add Mod 10 to test r/m64, imm32

This commit is contained in:
Takashi Kokubun 2023-03-05 20:51:58 -08:00
parent 7573854c9f
commit d51b4d4c3e
Notes: git 2023-03-06 07:29:26 +00:00

View file

@ -821,7 +821,7 @@ module RubyVM::MJIT
imm: imm8(right_imm),
)
# TEST r/m64, imm32 (Mod 01: [reg]+disp8)
in [Array[Symbol => left_reg, Integer => left_disp], Integer => right_imm] if imm32?(right_imm)
in [Array[Symbol => left_reg, Integer => left_disp], Integer => right_imm] if imm8?(left_disp) && imm32?(right_imm)
# REX.W + F7 /0 id
# MI: Operand 1: ModRM:r/m (r), Operand 2: imm8/16/32
insn(
@ -831,6 +831,17 @@ module RubyVM::MJIT
disp: left_disp,
imm: imm32(right_imm),
)
# TEST r/m64, imm32 (Mod 10: [reg]+disp32)
in [Array[Symbol => left_reg, Integer => left_disp], Integer => right_imm] if imm32?(left_disp) && imm32?(right_imm)
# REX.W + F7 /0 id
# MI: Operand 1: ModRM:r/m (r), Operand 2: imm8/16/32
insn(
prefix: REX_W,
opcode: 0xf7,
mod_rm: ModRM[mod: Mod10, reg: 0, rm: left_reg],
disp: imm32(left_disp),
imm: imm32(right_imm),
)
# TEST r/m64, imm32 (Mod 11: reg)
in [Symbol => left_reg, Integer => right_imm] if r64?(left_reg) && imm32?(right_imm)
# REX.W + F7 /0 id