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https://github.com/ruby/ruby.git
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188 lines
5.2 KiB
C
188 lines
5.2 KiB
C
typedef enum {
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SIMD_NONE,
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SIMD_NEON,
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SIMD_SSE2
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} SIMD_Implementation;
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#ifdef JSON_ENABLE_SIMD
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#ifdef __clang__
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# if __has_builtin(__builtin_ctzll)
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# define HAVE_BUILTIN_CTZLL 1
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# else
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# define HAVE_BUILTIN_CTZLL 0
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# endif
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#elif defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 3))
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# define HAVE_BUILTIN_CTZLL 1
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#else
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# define HAVE_BUILTIN_CTZLL 0
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#endif
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static inline uint32_t trailing_zeros64(uint64_t input)
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{
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#if HAVE_BUILTIN_CTZLL
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return __builtin_ctzll(input);
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#else
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uint32_t trailing_zeros = 0;
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uint64_t temp = input;
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while ((temp & 1) == 0 && temp > 0) {
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trailing_zeros++;
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temp >>= 1;
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}
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return trailing_zeros;
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#endif
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}
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static inline int trailing_zeros(int input)
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{
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#if HAVE_BUILTIN_CTZLL
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return __builtin_ctz(input);
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#else
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int trailing_zeros = 0;
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int temp = input;
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while ((temp & 1) == 0 && temp > 0) {
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trailing_zeros++;
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temp >>= 1;
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}
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return trailing_zeros;
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#endif
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}
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#if (defined(__GNUC__ ) || defined(__clang__))
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#define FORCE_INLINE __attribute__((always_inline))
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#else
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#define FORCE_INLINE
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#endif
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#define SIMD_MINIMUM_THRESHOLD 6
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#if defined(__ARM_NEON) || defined(__ARM_NEON__) || defined(__aarch64__) || defined(_M_ARM64)
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#include <arm_neon.h>
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#define FIND_SIMD_IMPLEMENTATION_DEFINED 1
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static inline SIMD_Implementation find_simd_implementation(void)
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{
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return SIMD_NEON;
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}
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#define HAVE_SIMD 1
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#define HAVE_SIMD_NEON 1
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// See: https://community.arm.com/arm-community-blogs/b/servers-and-cloud-computing-blog/posts/porting-x86-vector-bitmask-optimizations-to-arm-neon
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static inline FORCE_INLINE uint64_t neon_match_mask(uint8x16_t matches)
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{
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const uint8x8_t res = vshrn_n_u16(vreinterpretq_u16_u8(matches), 4);
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const uint64_t mask = vget_lane_u64(vreinterpret_u64_u8(res), 0);
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return mask & 0x8888888888888888ull;
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}
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static inline FORCE_INLINE uint64_t compute_chunk_mask_neon(const char *ptr)
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{
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uint8x16_t chunk = vld1q_u8((const unsigned char *)ptr);
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// Trick: c < 32 || c == 34 can be factored as c ^ 2 < 33
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// https://lemire.me/blog/2025/04/13/detect-control-characters-quotes-and-backslashes-efficiently-using-swar/
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const uint8x16_t too_low_or_dbl_quote = vcltq_u8(veorq_u8(chunk, vdupq_n_u8(2)), vdupq_n_u8(33));
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uint8x16_t has_backslash = vceqq_u8(chunk, vdupq_n_u8('\\'));
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uint8x16_t needs_escape = vorrq_u8(too_low_or_dbl_quote, has_backslash);
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return neon_match_mask(needs_escape);
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}
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static inline FORCE_INLINE int string_scan_simd_neon(const char **ptr, const char *end, uint64_t *mask)
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{
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while (*ptr + sizeof(uint8x16_t) <= end) {
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uint64_t chunk_mask = compute_chunk_mask_neon(*ptr);
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if (chunk_mask) {
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*mask = chunk_mask;
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return 1;
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}
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*ptr += sizeof(uint8x16_t);
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}
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return 0;
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}
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static inline uint8x16x4_t load_uint8x16_4(const unsigned char *table)
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{
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uint8x16x4_t tab;
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tab.val[0] = vld1q_u8(table);
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tab.val[1] = vld1q_u8(table+16);
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tab.val[2] = vld1q_u8(table+32);
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tab.val[3] = vld1q_u8(table+48);
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return tab;
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}
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#endif /* ARM Neon Support.*/
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#if defined(__amd64__) || defined(__amd64) || defined(__x86_64__) || defined(__x86_64) || defined(_M_X64) || defined(_M_AMD64)
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#ifdef HAVE_X86INTRIN_H
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#include <x86intrin.h>
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#define HAVE_SIMD 1
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#define HAVE_SIMD_SSE2 1
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#ifdef HAVE_CPUID_H
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#define FIND_SIMD_IMPLEMENTATION_DEFINED 1
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#if defined(__clang__) || defined(__GNUC__)
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#define TARGET_SSE2 __attribute__((target("sse2")))
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#else
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#define TARGET_SSE2
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#endif
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#define _mm_cmpge_epu8(a, b) _mm_cmpeq_epi8(_mm_max_epu8(a, b), a)
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#define _mm_cmple_epu8(a, b) _mm_cmpge_epu8(b, a)
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#define _mm_cmpgt_epu8(a, b) _mm_xor_si128(_mm_cmple_epu8(a, b), _mm_set1_epi8(-1))
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#define _mm_cmplt_epu8(a, b) _mm_cmpgt_epu8(b, a)
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static inline TARGET_SSE2 FORCE_INLINE int compute_chunk_mask_sse2(const char *ptr)
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{
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__m128i chunk = _mm_loadu_si128((__m128i const*)ptr);
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// Trick: c < 32 || c == 34 can be factored as c ^ 2 < 33
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// https://lemire.me/blog/2025/04/13/detect-control-characters-quotes-and-backslashes-efficiently-using-swar/
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__m128i too_low_or_dbl_quote = _mm_cmplt_epu8(_mm_xor_si128(chunk, _mm_set1_epi8(2)), _mm_set1_epi8(33));
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__m128i has_backslash = _mm_cmpeq_epi8(chunk, _mm_set1_epi8('\\'));
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__m128i needs_escape = _mm_or_si128(too_low_or_dbl_quote, has_backslash);
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return _mm_movemask_epi8(needs_escape);
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}
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static inline TARGET_SSE2 FORCE_INLINE int string_scan_simd_sse2(const char **ptr, const char *end, int *mask)
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{
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while (*ptr + sizeof(__m128i) <= end) {
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int chunk_mask = compute_chunk_mask_sse2(*ptr);
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if (chunk_mask) {
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*mask = chunk_mask;
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return 1;
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}
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*ptr += sizeof(__m128i);
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}
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return 0;
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}
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#include <cpuid.h>
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#endif /* HAVE_CPUID_H */
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static inline SIMD_Implementation find_simd_implementation(void)
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{
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// TODO Revisit. I think the SSE version now only uses SSE2 instructions.
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if (__builtin_cpu_supports("sse2")) {
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return SIMD_SSE2;
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}
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return SIMD_NONE;
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}
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#endif /* HAVE_X86INTRIN_H */
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#endif /* X86_64 Support */
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#endif /* JSON_ENABLE_SIMD */
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#ifndef FIND_SIMD_IMPLEMENTATION_DEFINED
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static inline SIMD_Implementation find_simd_implementation(void)
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{
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return SIMD_NONE;
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}
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#endif
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