Xiaolin Zheng
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9d9f4e502f
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8285437: riscv: Fix MachNode size mismatch for MacroAssembler::verify_oops*
Reviewed-by: shade, fyang
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2022-04-24 02:17:03 +00:00 |
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Feilong Jiang
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b10833bbf3
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8285303: riscv: Incorrect register mask in call_native_base
Co-authored-by: Dingli Zhang <dingli@iscas.ac.cn>
Reviewed-by: fyang, yadongwang
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2022-04-22 23:48:57 +00:00 |
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Magnus Ihse Bursie
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4594696f54
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8284903: Fix typos in hotspot
Reviewed-by: cjplummer, coleenp, kvn, lucy, stefank
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2022-04-19 19:10:52 +00:00 |
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Feilong Jiang
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060a188733
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8283865: riscv: Break down -XX:+UseRVB into seperate options for each bitmanip extension
Reviewed-by: fyang, shade
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2022-04-02 02:55:50 +00:00 |
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Xiaolin Zheng
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b82b009047
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8283737: riscv: MacroAssembler::stop() should emit fixed-length instruction sequence
Reviewed-by: fyang, shade
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2022-03-30 09:04:55 +00:00 |
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Fei Yang
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5905b02c0e
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8276799: Implementation of JEP 422: Linux/RISC-V Port
Co-authored-by: Yadong Wang <yadonn.wang@huawei.com>
Co-authored-by: Yanhong Zhu <zhuyanhong2@huawei.com>
Co-authored-by: Feilong Jiang <jiangfeilong@huawei.com>
Co-authored-by: Kun Wang <wangkun49@huawei.com>
Co-authored-by: Zhuxuan Ni <nizhuxuan@huawei.com>
Co-authored-by: Taiping Guo <guotaiping1@huawei.com>
Co-authored-by: Kang He <hekang6@huawei.com>
Co-authored-by: Aleksey Shipilev <shade@openjdk.org>
Co-authored-by: Xiaolin Zheng <yunyao.zxl@alibaba-inc.com>
Co-authored-by: Kuai Wei <kuaiwei.kw@alibaba-inc.com>
Co-authored-by: Magnus Ihse Bursie <ihse@openjdk.org>
Reviewed-by: ihse, dholmes, rriggs, kvn, shade
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2022-03-24 09:22:46 +00:00 |
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