archive/jdk
1
0
Fork 0
mirror of https://github.com/openjdk/jdk.git synced 2025-09-21 03:24:38 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions
73790 commits 342 branches 1046 tags 2.2 GiB
Commit graph

52 commits

Author SHA1 Message Date
Stefan Karlsson
d20034b09c 8307058: Implementation of Generational ZGC 
Co-authored-by: Stefan Karlsson <stefank@openjdk.org>
Co-authored-by: Erik Österlund <eosterlund@openjdk.org>
Co-authored-by: Axel Boldt-Christmas <aboldtch@openjdk.org>
Co-authored-by: Per Liden <pliden@openjdk.org>
Co-authored-by: Stefan Johansson <sjohanss@openjdk.org>
Co-authored-by: Albert Mingkun Yang <ayang@openjdk.org>
Co-authored-by: Erik Helin <ehelin@openjdk.org>
Co-authored-by: Roberto Castañeda Lozano <rcastanedalo@openjdk.org>
Co-authored-by: Nils Eliasson <neliasso@openjdk.org>
Co-authored-by: Martin Doerr <mdoerr@openjdk.org>
Co-authored-by: Leslie Zhai <lzhai@openjdk.org>
Co-authored-by: Fei Yang <fyang@openjdk.org>
Co-authored-by: Yadong Wang <yadongwang@openjdk.org>
Reviewed-by: eosterlund, aboldtch, rcastanedalo
 2023-05-11 13:59:37 +00:00
Roman Kennke
7f6358a8b5 8291555: Implement alternative fast-locking scheme 
Co-authored-by: Fei Yang <fyang@openjdk.org>
Co-authored-by: Thomas Stuefe <stuefe@openjdk.org>
Reviewed-by: dcubed, stuefe, shade, dholmes, dlong
 2023-05-08 17:51:39 +00:00
Dingli Zhang
1c1a73f715 8302908: RISC-V: Support masked vector arithmetic instructions for Vector API 
Co-authored-by: zifeihan <caogui@iscas.ac.cn>
Reviewed-by: fyang, fjiang, yzhu
 2023-04-26 02:24:49 +00:00
Johan Sjölen
d2ce04bb10 8301496: Replace NULL with nullptr in cpu/riscv 
Reviewed-by: dholmes, fyang
 2023-04-14 09:53:46 +00:00
Feilong Jiang
137513025d 8305728: RISC-V: Use bexti instruction to do single-bit testing 
Reviewed-by: fyang, yzhu
 2023-04-11 03:00:54 +00:00
Matias Saavedra Silva
127afd3445 8241613: Suspicious calls to MacroAssembler::null_check(Register, offset) 
Reviewed-by: dholmes, coleenp, fparain, adinn
 2023-04-03 12:59:02 +00:00
Dingli Zhang
a144c713b7 8305008: RISC-V: Factor out immediate checking functions from assembler_riscv.inline.hpp 
Reviewed-by: fjiang, fyang
 2023-03-31 01:22:54 +00:00
Roman Kennke
7cf7e0a20b 8302070: Factor null-check into load_klass() calls 
Reviewed-by: phh, coleenp
 2023-02-20 15:13:36 +00:00
Gui Cao
c04a982eb4 8301818: RISC-V: Factor out function mvw from MacroAssembler 
Reviewed-by: luhenry, fyang, fjiang
 2023-02-07 04:48:57 +00:00
Xiaolin Zheng
773050647e 8299162: Refactor shared trampoline emission logic 
Reviewed-by: fyang, adinn, luhenry
 2023-02-06 12:38:36 +00:00
Fei Yang
ebb84ad70d 8301036: RISC-V: Factor out functions baseOffset & baseOffset32 from MacroAssembler 
Reviewed-by: luhenry, fjiang, shade
 2023-01-30 12:24:19 +00:00
Yadong Wang
af564e46b0 8299844: RISC-V: Implement _onSpinWait intrinsic 
Reviewed-by: fjiang, fyang, luhenry
 2023-01-28 02:17:44 +00:00
Feilong Jiang
24cdcd4c70 8293841: RISC-V: Implementation of Foreign Function & Memory API (Preview) 
Co-authored-by: Weikai He <weikai@isrc.iscas.ac.cn>
Co-authored-by: Fei Yang <fyang@openjdk.org>
Reviewed-by: jvernee, fyang, shade, yadongwang
 2023-01-19 01:33:35 +00:00
Axel Boldt-Christmas
c7056737e3 8299089: Instrument global jni handles with tag to make them distinguishable 
Co-authored-by: Stefan Karlsson <stefank@openjdk.org>
Co-authored-by: Martin Doerr <mdoerr@openjdk.org>
Co-authored-by: Leslie Zhai <lzhai@openjdk.org>
Reviewed-by: eosterlund, stefank, ayang
 2023-01-18 09:21:08 +00:00
Tobias Hartmann
cc4936a79e 8298720: Insufficient error handling when CodeBuffer is exhausted 
Reviewed-by: kvn, fyang
 2023-01-06 08:28:09 +00:00
Xiaolin Zheng
74f346b33f 8298075: RISC-V: Implement post-call NOPs 
Reviewed-by: fyang, luhenry
 2022-12-08 02:19:35 +00:00
Fei Yang
c3b285a8ac 8296916: RISC-V: Move some small macro-assembler functions to header file 
Reviewed-by: fjiang, yadongwang, shade
 2022-11-16 12:01:42 +00:00
Stefan Karlsson
bfc5816595 8295475: Move non-resource allocation strategies out of ResourceObj 
Reviewed-by: coleenp, stuefe, rehn, dholmes
 2022-11-10 08:31:37 +00:00
Xiaolin Zheng
93fed9b251 8296448: RISC-V: Fix temp usages of heapbase register killed by MacroAssembler::en/decode_klass_not_null 
Reviewed-by: fyang, yadongwang
 2022-11-10 01:30:51 +00:00
Gui Cao
fef68bbaf6 8296515: RISC-V: Small refactoring for MaxReductionV/MinReductionV/AddReductionV node implementation 
Reviewed-by: luhenry, dzhang, yzhu, fyang
 2022-11-09 09:38:36 +00:00
Feilong Jiang
4c80dff2ca 8296435: RISC-V: Small refactoring for increment/decrement 
Reviewed-by: fyang
 2022-11-08 01:12:35 +00:00
Gui Cao
087cedc080 8295261: RISC-V: Support ReductionV instructions for Vector API 
Reviewed-by: yadongwang, dzhang, fyang, eliu
 2022-11-07 04:59:45 +00:00
Fei Yang
91292d56a9 8286301: Port JEP 425 to RISC-V 
Co-authored-by: Xiaolin Zheng <xlinzheng@openjdk.org>
Reviewed-by: fjiang, xlinzheng, yadongwang, jiefu, rrich
 2022-11-05 02:18:49 +00:00
Dingli Zhang
c116ae75a7 8295967: RISC-V: Support negVI/negVL instructions for Vector API 
Reviewed-by: yadongwang, fyang
 2022-11-04 09:08:26 +00:00
Ludovic Henry
e0c29307f7 8295282: Use Zicboz/cbo.zero to zero-out memory on RISC-V 
Reviewed-by: yadongwang, vkempik, fyang
 2022-10-25 20:11:48 +00:00
Fei Yang
ef62b614d1 8295703: RISC-V: Remove implicit noreg temp register arguments in MacroAssembler 
Reviewed-by: shade, fjiang
 2022-10-21 02:29:45 +00:00
Zixian Cai
5dbd495115 8295457: Make the signatures of write barrier methods consistent 
Reviewed-by: tschatzl, shade
 2022-10-18 15:32:20 +00:00
Axel Boldt-Christmas
6553065cab 8295273: Remove unused argument in [load/store]_sized_value on aarch64 and riscv 
Reviewed-by: fyang, haosun
 2022-10-18 08:58:25 +00:00
Xiaolin Zheng
9005af3b90 8295110: RISC-V: Mark out relocations as incompressible 
Reviewed-by: fyang, yadongwang
 2022-10-17 05:56:59 +00:00
Fei Yang
3d75e88eb2 8295270: RISC-V: Clean up and refactoring for assembler functions 
Reviewed-by: fjiang, yadongwang, shade
 2022-10-14 07:53:56 +00:00
Xiaolin Zheng
1decdcee71 8294492: RISC-V: Use li instead of patchable movptr at non-patchable callsites 
Reviewed-by: fyang
 2022-09-29 07:21:07 +00:00
Fei Yang
d827fd830a 8294430: RISC-V: Small refactoring for movptr_with_offset 
Reviewed-by: fjiang, yadongwang, shade
 2022-09-28 00:22:16 +00:00
Xiaolin Zheng
a216960d71 8294087: RISC-V: RVC: Fix a potential alignment issue and add more alignment assertions for the patchable calls/nops 
Reviewed-by: shade, fjiang, fyang
 2022-09-22 11:43:47 +00:00
Xiaolin Zheng
d5bee4a0df 8294086: RISC-V: Cleanup InstructionMark usages in the backend 
Reviewed-by: fjiang, fyang
 2022-09-22 03:48:06 +00:00
Feilong Jiang
742bc041ea 8294100: RISC-V: Move rt_call and xxx_move from SharedRuntime to MacroAssembler 
Reviewed-by: shade, fyang
 2022-09-22 00:58:31 +00:00
Yanhong Zhu
84ee1a291c 8293781: RISC-V: Clarify types of calls 
Reviewed-by: fjiang, fyang, yadongwang
 2022-09-20 12:12:35 +00:00
Feilong Jiang
5feca688df 8293840: RISC-V: Remove cbuf parameter from far_call/far_jump/trampoline_call 
Reviewed-by: fyang
 2022-09-16 11:40:31 +00:00
Fei Yang
7376c55219 8293769: RISC-V: Add a second temporary register for BarrierSetAssembler::load_at 
Reviewed-by: fjiang, shade
 2022-09-14 23:50:35 +00:00
Feilong Jiang
68645ebffb 8293566: RISC-V: Clean up push and pop registers 
Reviewed-by: fyang, shade
 2022-09-13 01:07:04 +00:00
Fei Yang
fc5f97fe37 8293474: RISC-V: Unify the way of moving function pointer 
Reviewed-by: yadongwang, fjiang, shade
 2022-09-08 01:14:08 +00:00
Fei Yang
5bed9f7675 8293290: RISC-V: Explicitly pass a third temp register to MacroAssembler::store_heap_oop 
Reviewed-by: shade
 2022-09-05 10:02:08 +00:00
Axel Boldt-Christmas
9e3176bd09 8293035: Cleanup MacroAssembler::movoop code patching logic aarch64 riscv 
Reviewed-by: eosterlund, fyang
 2022-08-31 07:42:22 +00:00
Yadong Wang
e016363b54 8293007: riscv: failed to build after JDK-8290025 
Reviewed-by: fyang, fjiang, shade
 2022-08-30 01:17:41 +00:00
Yadong Wang
5a539e8da7 8291893: riscv: remove fence.i used in user space 
Reviewed-by: fyang, vkempik
 2022-08-08 11:47:36 +00:00
Aleksey Shipilev
8159a1ab70 8290706: Remove the support for inline contiguous allocations 
Reviewed-by: eosterlund, aph, rrich, fyang, thartmann
 2022-07-26 17:19:10 +00:00
Fei Yang
92067e2003 8290137: riscv: small refactoring for add_memory_int32/64 
Reviewed-by: yadongwang, fjiang, shade
 2022-07-18 13:01:35 +00:00
Xiaolin Zheng
447ae00616 8287418: riscv: Fix correctness issue of MacroAssembler::movptr 
Reviewed-by: fjiang, yadongwang, fyang
 2022-05-30 07:45:50 +00:00
Yadong Wang
94b533a94c 8285699: riscv: Provide information when hitting a HaltNode 
Reviewed-by: fyang
 2022-04-29 03:19:29 +00:00
Xiaolin Zheng
4bf2c18d6c 8285435: Show file and line in MacroAssembler::verify_oop for AArch64 and RISC-V platforms (Port from x86) 
Reviewed-by: ngasson, fyang
 2022-04-25 23:57:08 +00:00
Feilong Jiang
b10833bbf3 8285303: riscv: Incorrect register mask in call_native_base 
Co-authored-by: Dingli Zhang <dingli@iscas.ac.cn>
Reviewed-by: fyang, yadongwang
 2022-04-22 23:48:57 +00:00